Top 10 Semiconductor News
1. TSMC Posts Record Q3 Revenue Of US$46.7 Billion, With 2nm At 8% Of Wafer Revenue (October 15, 2026) TSMC reported consolidated revenue of NT$1,494.24 billion (US$46.72 billion), up 41.2% year over year and 16.2% sequentially, with net income of NT$763.06 billion and diluted EPS of NT$29.43. Gross margin reached 66.4% and operating margin 58.7%, while 2nm shipments reached 8% of wafer revenue, 3nm 33% and 5nm 28%, putting 7nm-and-above advanced technologies at 79%. Fourth-quarter guidance is US$52.3-54.3 billion at a 65-67% gross margin, and management raised full-year 2026 US-dollar revenue growth to about 44% while holding capital expenditure at US$60-64 billion. For fabless designers the message is that leading-edge capacity remains sold out well into 2027, so wafer cost increases on advanced nodes should be planned for now rather than later; TSMC also confirmed a new 3nm fab in Tainan, Arizona Fab 2 output from the third quarter of 2027, Japan Fab 2 on 3nm from 2028, and A14 in 2028. (Source: TSMC 3Q26 earnings release and analyst call; Reuters; Economic Daily News)
2. TrendForce Lifts 4Q26 Memory Forecast: DRAM Up About 20%, Enterprise SSD Up 23-28% (October 21, 2026) TrendForce’s updated fourth-quarter 2026 memory pricing view, reported on October 20-21, puts the aggregate DRAM contract price increase at roughly 20% quarter over quarter, down from about 80% in the second quarter and 40% in the third as the market shifts from blanket price hikes to structural shortage. Conventional DRAM is forecast to rise 10-15%, overall DRAM including HBM 15-20%, NAND Flash 15-20%, and enterprise SSD 23-28%, the only category where the rate of increase accelerates; enterprise SSD bit demand is projected to grow more than 80% year over year in 2026. Mobile LPDDR5X and UFS gains have collapsed to low single digits, and DRAM suppliers continue to route roughly 70% of new capacity to HBM. Designers and industrial buyers should model fourth-quarter and first-quarter memory cost with AI-side products absorbing nearly all incremental wafer output, while consumer and mobile lines stop paying the same premium. (Source: TrendForce memory industry research; Commercial Times; China Business Journal)
3. ASML Posts Record Quarter With EUR11.66 Billion In Sales, 57.5% Gross Margin And 113 New Tools (October 14, 2026) ASML reported record third-quarter 2026 net sales of EUR11.662 billion, against EUR9.326 billion in the second quarter, gross margin of 57.5%, net income of EUR4.96 billion and basic EPS of EUR12.95, after selling 113 new lithography systems; Installed Base Management sales rose to EUR3.289 billion. Fourth-quarter guidance is EUR14.2-15.2 billion at a gross margin near 57%, and full-year 2026 sales of EUR44-45 billion with gross margin around 56%. The forward-looking point for chip designers is chief executive Christophe Fouquet’s warning that planned 2027 and 2028 supply will not fully meet customer demand, that ASML is investigating capacity increases beyond the previously communicated 30% for 2028, and that some customers are already discussing orders for 2029 and 2030. Persistent tool scarcity keeps advanced-node and advanced-packaging cost inflation structurally embedded in the supply chain. (Source: ASML Q3 2026 results press release; Reuters)
4. NVIDIA Standardizes HBM4E Base Dies On TSMC 3nm, Samsung Breaks Its Turnkey Habit (October 18, 2026) NVIDIA has asked Samsung, SK hynix and Micron to fabricate the base die of its custom NVHBM on TSMC’s 3nm process with core dies standardized on sixth-generation 1c DRAM, so a single design can be validated across all three suppliers; NVHBM builds on the HBM4E architecture and is claimed to deliver up to 30% more bandwidth and 15% lower HBM power than standard HBM4E. Samsung’s Device Solutions division has accepted, so for the first time it will outsource the HBM base die instead of using its own 4nm foundry base, marking the two companies’ first manufacturing-stage partnership in HBM. Samsung retains a turnkey model for standard HBM and for AMD’s custom parts, and is evaluating its own foundry, with 2nm as a backup, in case NVHBM demand outruns TSMC capacity. The consequence for memory vendors is that a single AI customer now dictates the logic-base process node for much of the HBM roadmap, raising the strategic weight of foundry qualification and reshaping the boundary between foundry and memory. (Source: Seoul Economic Daily; Reuters; United Business Daily; TrendForce)
5. Samsung Orders More 2nm Tools For Taylor Fab 1, Targeting 20,000 Wafers Per Month (October 23, 2026) Samsung has placed an additional 2nm equipment order for its first Taylor, Texas fab worth about 6,000 wafers per month, taking planned 2nm tool capacity in Fab 1 to roughly 20,000 wafers per month by the second half of 2027, the cleanroom’s design ceiling, with tools beginning to arrive from late 2026. Samsung’s 2nm yield has reportedly climbed from about 60% early this year to roughly 80%, and reported customers include Tesla, whose July 2025 long-term agreement covers AI5 and AI6 chips through 2033, and Broadcom. Taylor Fab 1 is the flagship US investment with about US$37 billion committed and up to US$4.745 billion in CHIPS Act grants, and Fab 2 construction is targeted to start before year-end for 2030 operation. For fabless designers this is the most credible second-source signal on 2nm, although TSMC still held 72.5% of second-quarter foundry revenue against Samsung’s 5.9%. (Source: ZDNet Korea; DIGITIMES; TrendForce foundry share data)
6. Micron Rejects 4F-Squared DRAM, Stays On 6F-Squared And Pivots To 3D DRAM (October 21, 2026) At its October 21 technology roadmap webinar, Micron President and Chief Technology and Product Officer Scott DeBoer said the company evaluated 4F-squared DRAM for more than 20 years and will not commercialize it, citing higher process complexity and cost and the reality that bit density is ultimately set by capacitor pitch, calling the 4F-squared versus 6F-squared debate partly smoke and mirrors. Micron will keep scaling 6F-squared, with 1-gamma in production using EUV, 1-delta ramping to volume in the second half of 2027 and 1-epsilon adding wafer bonding, then move to fully vertical 3D DRAM, with HBM4E in 2027 and HBM5, HBM5E and HBM6 through 2030. Samsung and SK hynix are both still developing 4F-squared, and CXMT said in October it expects 4F-squared-based server DDR5 RDIMMs by year-end, so the industry is now split across three incompatible DRAM roadmaps that module, controller and industrial system designers must qualify against. (Source: Micron technology roadmap webinar, as reported by Nikkei Asia and TrendForce; Business Korea)
7. China Drafts Export Controls On AI Chip And Advanced Memory Design Technology (October 16, 2026) China’s Ministry of Commerce and Ministry of Science and Technology published a draft revision of the Catalogue of Technologies Prohibited or Restricted for Export on October 16, adding 40 technologies, 23 in AI, 12 in solar and 5 in biomedicine, split into 14 prohibited and 26 restricted items, with public comment running to November 15 while export-before-registration rules already took effect. Restricted entries cover AI processing chip design requiring 14nm or below, 2.5D and 3D advanced packaging, high-speed interconnect and non-Von Neumann architectures, plus memory chip design including 18nm-and-below memory process, vertical-channel transistors, bonding and multi-layer stacking, and 3D NAND at 8 Gb/mm2 or above or 1.5 Gbps I/O or above; AI cluster interconnect at 800 GB/s bidirectional is also listed. Chinese design houses must now self-assess their own chip architectures, IP and packaging stacks for export compliance and register before transfer, while open-source code and published research stay exempt. For a domestic IC design company this turns memory and accelerator architecture know-how into a regulated, export-controlled asset. (Source: MOFCOM and MOST Announcement No. 48 of 2026; Global Times)
8. GlobalFoundries Signs US$2 Billion, 5-Year Deal To Supply TSMC CoWoS Interposers (October 12, 2026) GlobalFoundries and TSMC signed a total US$2 billion, initially five-year manufacturing agreement disclosed on October 12, under which GF will expand its Malta, New York fab to produce silicon interposers for TSMC’s CoWoS advanced packaging, with volume ramping from the first half of 2028. The silicon interposer is the 2.5D carrier that links accelerator dies and HBM stacks, and CoWoS capacity has been the binding constraint on AI accelerator shipments through 2026. The deal shows the packaging bottleneck being attacked by adding a second qualified interposer source rather than by building new capacity alone, and it lands alongside a broader package-substrate, advanced-packaging and test build-out that is being paid for directly by AI customers. For fabless designers the practical message is that 2.5D and 3D assembly supply, not just wafer starts, remains the gating factor for 2027-28 products. (Source: SEMI; International Electronics Business News)
9. Everspin To Chair New JEDEC Task Group On LPDDR Persistent Memory (October 20, 2026) Everspin announced on October 20 that corporate strategy vice president Steffen Hellmold will chair a new JEDEC task group, established under the JC-42.6 Low Power Memories subcommittee, to explore a persistent memory standard inside the existing LPDDR ecosystem while limiting changes to LPDDR DRAM standards and host controllers. The group will address controller support for both DRAM and persistent memory, and approaches that let LPDDR DRAM and PMEM from multiple vendors coexist in compatible system architectures, and it brings together memory, storage, controller and hyperscale participants. In a separate EE Times interview published October 22, Everspin president and chief executive Sanjeev Aggarwal pushed MRAM into AI servers, data centers and satellite systems, and noted the replacement window opened by tightening NOR Flash supply. For industrial and automotive designers, a standardized LPDDR PMEM path would remove much of the friction of qualifying non-volatile memory alongside LPDDR in the same system. (Source: Everspin Technologies press release; EE Times interview with CEO Sanjeev Aggarwal)
10. China’s MRAM Supply Chain Closes In: MgO Targets, 12-Inch Fabs And STT/SOT Parts (October 27, 2026) A late-October review documents China’s MRAM chain maturing at the same time on materials, equipment, fabs and products: Shanghai Siproin has begun commercial shipments of STT-MRAM, Chipmore operates the country’s only volume 12-inch MRAM line with 90nm, 40nm and 28nm platforms spanning 256Kb to 64Mb for industrial, automotive and space use, and Truly has validated a 256Kb SOT-MRAM device in drone flight control, including operation from -40 to 125C and radiation tolerance. On materials, Suzhou Zhicai’s 6-inch MRAM magnesium-oxide sputtering target, 4N purity with density above 99.8%, closes the last imported layer of the magnetic tunnel junction stack, while Luwen Instruments’ 12-inch LMEC-300 integrates ion-beam milling with ICP etch and in-vacuum passivation to protect sub-10nm films. The remaining gap is advanced-node embedded MRAM, where production still depends on Samsung and TSMC processes. (Source: Semiconductor Industry Review industry analysis, also carried by 36Kr and MarsBit)
Top 10 Technology News
1. Anthropic Files For A Nasdaq IPO That Could Be The Largest In History (October 26, 2026) Anthropic filed an S-1 registration statement with the SEC to list Class A common stock on the Nasdaq Global Select Market under the ticker ANT, with the share count, price range and offering date still undisclosed. The filing showed first-half 2026 revenue of US$16.29 billion against about US$1.16 billion a year earlier, third-quarter revenue of roughly US$16.8 billion, and a second-quarter operating profit of US$974 million, about 8.4% margin, and adjusted operating profit of US$2.24 billion, 19.3% margin. It also disclosed heavy long-term commitments, including up to US$114.5 billion of cloud infrastructure with Google and about US$120.5 billion for compute based on Nvidia processors, with Broadcom separately arranging US$63 billion of financing for Anthropic’s XPU accelerators. At an estimated US$100 billion raise, the listing would be the largest IPO in history and marks the arrival of a frontier lab as a public, quarterly-reporting company. (Source: Reuters; CNBC; Bloomberg)
2. OpenAI Plans To Buy Google TPUs Directly, Taking On Nvidia As A Second Source (October 27, 2026) The Information, reported by Reuters, said OpenAI plans to purchase Google’s Tensor Processing Units outright rather than only renting capacity, though financial terms were not disclosed and neither company confirmed the plan. OpenAI is already one of the largest buyers of Nvidia GPUs, and Google began selling TPUs directly to selected customers this year, with Alphabet expecting only a small share of TPU revenue to be recognized by the end of 2026 and the vast majority in 2027. The move comes as Amazon, Microsoft and Alphabet plan to spend up to US$600 billion combined on AI infrastructure in 2026 while investors question when that spending converts into returns. If it happens, Google becomes a credible second source of merchant AI silicon, and Nvidia’s dominance in training and inference accelerators faces its strongest challenge yet. (Source: Reuters, reporting The Information)
3. Moonshot AI Launches Kimi K3.1 Pro, A 3-Trillion-Parameter Open-Weight Model (October 23, 2026) Moonshot AI released Kimi K3.1 Pro, the first model of its new K3.1 series, describing it as its most capable 3-trillion-parameter class model with a 1-million-token context window; a companion Highspeed tier runs roughly 2-3 times faster at twice the per-token price. On Terminal-Bench 4.0 the model scored 65.7%, ahead of GPT-6 Astra at 58.2% and narrowly behind Claude Opus 5.5 at 66.4%, while its internal Kimi Code Bench 3.0 long-horizon reached 61.2% against 55.95% for Kimi K3. Full open weights were promised by November 4, making it one of the largest open-weight releases of the month and a direct challenge to closed frontier APIs in coding and long-horizon agent work. (Source: Moonshot AI, Kimi Blog)
4. Google DeepMind’s Genie 4 Adds Native Audio And Real-Time World Steering (October 27, 2026) Google DeepMind announced Genie 4, its new world model, as a research preview for trusted testers ahead of broader rollout to Google AI Ultra subscribers in Project Genie and to Gemini API and AI Studio early-access partners. The model is natively multimodal, generating music, ambient sound and interactive dialogue alongside the visual world, and users can steer it in real time with natural-language prompts to change weather, camera angle or add characters and objects. Compared with Genie 3, scene consistency is extended to roughly two minutes, twice the previous generation, with better physics and more realistic human motion. Google also demonstrated Gemini 4 Argon decomposing a task into steps that Genie 4 renders as a real-time simulation, including a humanoid robot from Apptronik playing checkers, pointing toward a hybrid architecture in which language models plan while world models render. (Source: Google DeepMind company blog; TechCrunch)
5. FDA Approves INOVIO’s VOCERYQ, The First DNA Medicine Cleared In The United States (October 30, 2026) The US FDA granted accelerated approval to INOVIO Pharmaceuticals for VOCERYQ, a plasmid DNA immunotherapy for reducing the frequency of surgery in adults with recurrent respiratory papillomatosis, a rare HPV-6 and HPV-11 disease whose standard of care is repeated surgery. It is the first plasmid DNA immunotherapy and the first DNA medicine ever approved in the United States. INOVIO’s RRP-001 study showed 7 of 26 efficacy-population patients, 27% with a 95% confidence interval of 12 to 48, achieved complete response with no surgical excision over 12 months, against a median of 4.5 excisions in the prior year. The drug is administered with the CELLECTRA 5PSP electroporation device, with order and shipment expected in about 60 days and full commercial launch in the first quarter of 2027. (Source: INOVIO Pharmaceuticals; US FDA)
6. EU AI Act Gains Its First Harmonized Standard With EN 18286:2026 (October 14, 2026) Commission Implementing Decision (EU) 2026/2274, adopted on October 12 and published in the Official Journal on October 14, cites EN 18286:2026, Artificial intelligence: Quality management system for EU AI Act regulatory purposes, as the first harmonized standard supporting the AI Act. Providers of high-risk AI systems that build their Article 17 quality management system on the CEN-CENELEC standard now gain a presumption of conformity, materially lowering the cost of proving compliance, and the standard maps onto ISO/IEC 42001 and ISO 9001 so regulated firms can extend existing management systems rather than run parallel ones. It is the first deliverable under standardization request M/613; additional standards covering risk management, data governance, logging, human oversight and cybersecurity remain in draft, with the amended request running to February 28, 2027. (Source: European Commission, DG CONNECT; CEN-CENELEC JTC 21)
7. Apple’s 2nm M6 Lands Across MacBook Pro, iMac And A New iPad mini (October 27, 2026) Apple introduced a 14-inch MacBook Pro with the M6 chip, a new M6-powered iMac, and the most significant iPad mini update in the product’s history, following a Pro Display XDR MacBook Pro announcement on October 28 and iOS 27.2 on October 26. The M6 is Apple’s first 2nm processor with a 12-core CPU, 12-core GPU and dual 16-core Neural Engine, and it now covers Mac mini, MacBook Pro and iMac, putting the mainstream Mac line on 2nm silicon. The new iPad mini pairs an 8.5-inch OLED panel at up to 1,200 nits and a 2,000,000:1 contrast ratio with the 2nm A20 Pro, 24 percent thinner bezels, a 5.4mm body and an IP67 rating, with orders opening October 28 and availability from November 6. A 2nm ramp across three product families in a single month is a meaningful volume signal for the foundry and OSAT supply chain. (Source: Apple Newsroom; TechCrunch)
8. JAXA’s MMX Launches On The First Sample-Return Mission To A Martian Moon (October 19, 2026) Japan’s space agency launched the Martian Moons eXploration spacecraft on an H3 rocket from the Tanegashima Space Center at 3:41 p.m. EDT on October 19, beginning the first mission ever designed to return samples from a natural satellite other than Earth’s Moon. The roughly 4,480 kilogram three-module spacecraft targets arrival at Mars in August 2027, surface sampling of Phobos no earlier than December 2028 and sample return to Earth in 2031, with at least 10 grams of material expected in the return capsule. NASA contributes the MEGANE gamma-ray and neutron spectrograph, Deep Space Network support and curation of about 15% of the returned sample at the Johnson Space Center, with an end-of-mission lifecycle cost of US$87 million, while Honeybee Robotics built the pneumatic P-Sampler that blows nitrogen to lift regolith into a collection chamber, and a Franco-German Idefix rover will scout landing sites. The mission will test whether Phobos and Deimos are captured asteroids or collision remnants. (Source: NASA press release; JAXA; Space Today)
9. CATL Unveils Tianxing II Heavy-Truck Battery Swap, Plans 900 Stations By Year-End (October 20, 2026) CATL introduced the Tianxing II electric-electric range-extended heavy-truck platform, splitting the battery into a leased undercarriage swap pack and a portable range-extender pack so operators can cut upfront capital expenditure and rebalance packs across fleet duty cycles; the launch carried firm orders for 13,000 units signed with China Post, SF Express, STO, YTO and Chongqing Logistics. The company plans to build 900 swap stations by the end of 2026, 2,000 in 2027 and a long-term target of 10,000, with five-minute swaps already running past 5 million kilometers on five trunk routes. CATL says more than 430,000 electric heavy trucks in China carry its batteries, over 70% of the market, and that electric trucks reached 50.28% penetration in September 2026 alone, evidence that battery swapping is becoming a scaled infrastructure layer rather than a niche model. (Source: CATL; China Securities Journal)
10. NVision Publishes The First Molecular Qubit In Nature, Partners With HyperLight (October 28, 2026) NVision announced that its paper A Single-Molecule Spin-Photon Interface is published in Nature, reporting the first individually addressable organic molecular spin-photon interface, clearing the barrier that had kept molecular spins from serving as true qubits because they could not be individually and coherently controlled. The result came after screening more than 150 candidate molecules and synthesizing 40, and lets qubits be deposited as thin films onto photonic chips the way OLED emitters are deposited, with the engineered carbene operating at 2-4 K and the platform claimed to tolerate up to 70% photon loss. Alongside the paper the company partnered with thin-film lithium niobate photonics specialist HyperLight to integrate the films into photonic integrated circuits, targeting an on-chip live demonstration by the end of 2026 and 1,000 physical qubits on the road to 1,000 logical fault-tolerant qubits by 2030. (Source: NVision Quantum; Nature)